1. Field of the Invention
The present invention generally relates to a lithography system comprising a plurality of lithography system units. The invention further relates to a method of handling substrates in such a lithography system.
2. Description of the Related Art
In the semiconductor industry, an ever increasing desire to manufacture smaller structures with high accuracy and reliability puts great demands on wafer processing technology. In particular, it is important to maximize wafer throughput of wafer processing equipment while maintaining the lowest capital costs and operational costs, and without excessive use of floor space. Floor space in a semiconductor manufacturing environment is expensive, as most space needs to meet high standard clean room conditions. Therefore, the floor space that is to be occupied by wafer processing equipment, i.e. the so-called footprint, is preferably as limited as possible. Furthermore, to ensure that clean room conditions can be maintained, wafer processing equipment is preferably serviced within the clean room.
A very critical step in the manufacturing of integrated circuits on a wafer is lithography. In a lithography process, a predetermined pattern is transferred onto a semiconductor substrate, often referred to as a wafer. Currently, the smallest dimensions of structures patterned with a lithography apparatus are about 70 nm in size. However, to produce even faster circuits structures of smaller size are desired.
Replacement of the current lithography systems by new systems capable of patterning with higher precision should not lead to a significant decrease in processing speed. Currently, a lithography apparatus patterns about 100 wafers per hour. Many newly developed lithography apparatuses, which can pattern smaller structures than currently possible, aim at a throughput of about 10 wafers per hour. Simple replacement of a present lithography apparatus by such new apparatus would thus reduce the throughput reduction of 10 times, which is often unacceptable.
It is desired that lithography apparatuses developed to achieve such smaller wafer patterns can be integrated in current clean rooms without major adjustments to the equipment used in the circuit manufacturing process. In other words, preferably newly developed higher resolution lithography apparatuses can replace the former lithography apparatuses without major adjustments in size, throughput and reliability.